I2C is a synchronous protocol which is used for data transfers between Integrated Circuits. It is used in systems, which has more than one IC and it wants to communicate to others. The aim of this project is to design I2C Core which transmits the data from the synchronous FIFO. The data received is also saved in FIFO. I2C master and slave operations are supported. The depth of the FIFO is 16. The design consists separate transmit and receive FIFOs.